The impulse response is the filter
Feed in δ[n] — one sample of 1, then silence. What comes out is h[n], and it contains everything: knowing h[n] means you can predict the output for any input by convolution. The response is either finite or it is infinite. There is no third option, and that is literally the naming scheme.
FIR: the stems stop. The filter only ever looks at the last N input samples, so after N samples of silence it has nothing left to say.
IIR: the stems decay geometrically. Each output sample is partly a recycled previous output, so the ringing shrinks by a constant factor forever. "Settled" only ever means "below my noise floor".
Where the difference actually lives: one wire
Both filters are built from the same three pieces — a delay, a multiply, an add. The only structural difference is whether a wire runs backward from the output.
Output depends only on inputs. The signal enters on the left and leaves on the right. Nothing circulates.
That amber loop is the entire story. Output re-enters the summer, so a single input keeps circulating, attenuated a little each lap.
| Property | FIR | IIR |
|---|---|---|
| Stability | Unconditional. No poles to run away. | Conditional — poles must stay inside the unit circle. |
| Linear phase | Free, if coefficients are symmetric. Constant group delay. | Not achievable causally. Phase warps near cutoff. |
| Order for a spec | High. A sharp 60 dB lowpass can need 100+ taps. | Low. Same spec in a 4th–8th order biquad chain. |
| Cost per sample | N multiply-accumulates. | Typically 5 MACs per biquad. |
| Coefficient rounding | Degrades the response, gently. | Moves poles. Can oscillate or blow up. |
| Arithmetic quirks | No feedback ⇒ no limit cycles. | Limit cycles, overflow oscillation, needs care in fixed point. |
| Transient | Settles in exactly N samples. | Exponential; "settled" is a threshold you pick. |
| Natural home | Digital. Needs exact delays. | Analog and digital. Any RC network is one. |
Why feedback is dangerous, drawn as a picture
Write the filter as H(z) = B(z)/A(z). Roots of the numerator are zeros — frequencies killed. Roots of the denominator are poles — frequencies amplified. A pole is only stable if it sits inside the unit circle, and feedback is what creates poles. An FIR filter's denominator is 1, so all its poles pile up harmlessly at the origin.
The impulse response grows without bound from a single input sample. Nothing external is driving it — the loop gain simply exceeds unity. This failure mode does not exist for FIR, at any coefficient value, ever.
Building it from parts: capacitors or registers
The two domains pull in opposite directions. Analog components store energy and leak it back — that is feedback, so analog gets you IIR almost for free and FIR only with pain. Digital hardware has a perfect, free, exact delay — a flip-flop — so it gets you FIR trivially and IIR with caveats.
The capacitor's stored charge is the state variable. Its voltage feeds back through R to oppose the input. Exponential decay, never zero — an infinite impulse response made of two passive parts.
C2 bootstraps the mid-node from the output — positive feedback that sets Q. Cascade a few and you have an elliptic anti-aliasing filter. This is the analog world's default answer to everything.
- The delay is the problem. A 10 µs analog delay is 2 km of coax or a bulky LC ladder that disperses and attenuates.
- Taps drift. Resistor tolerance and temperature move your coefficients around after the board is built.
- It is done anyway where nothing else works: SAW transversal filters, CCD/bucket-brigade lines, microwave tapped-line filters, and optical FIR built from splitters and fibre delays.
- z⁻¹ is one flip-flop. Exact, drift-free, temperature-independent, free on any FPGA.
- Coefficients are numbers in a ROM. Change the filter by rewriting memory, not by unsoldering.
- It maps to silicon directly. One DSP slice per tap in a systolic chain; symmetric taps fold, halving the multipliers.
| Analog | Digital | |
|---|---|---|
| Delay z⁻¹ / τ | Expensive, lossy, dispersive | One register. Exact. |
| Multiply by a constant | Resistor ratio, ±1% and drifting | Exact to the bit you allocate |
| Feedback / memory | Intrinsic — every C and L stores state | Deliberate, and needs stability analysis |
| So you naturally get… | IIR | FIR (and IIR if you want it) |
| Runs at | GHz, zero latency, no clock | Bounded by fs, plus converter latency |
| Still mandatory for | Anti-alias + reconstruction. Digital cannot fix what the ADC already folded. | Anything needing exact linear phase or reconfigurability |
Fourier transform, DFT, FFT — one is not like the others
These three names get used interchangeably and they are not the same kind of thing. Two are transforms — definitions in mathematics. One is an algorithm — a way of computing one of the transforms quickly. The confusion is worth clearing up because it decides what your spectrum plot actually means.
Continuous-time Fourier transform
Fourier series
Discrete-time Fourier transform (DTFT)
Discrete Fourier transform (DFT)
np.fft call returns.The DFT does not analyse "your signal". It analyses an infinite periodic repetition of your N samples. That assumption is baked into the definition, and it is the direct cause of spectral leakage in §08.
The FFT is a family of algorithms — Cooley–Tukey, radix-2, split-radix, Bluestein — that compute exactly the DFT, just without the redundant work. Same inputs, same outputs, same maths. Only the operation count differs.
Prove it: same numbers, wildly different clock time
Below, the naive O(N²) DFT and a radix-2 FFT run on the same random data, in your browser, right now. Compare the outputs and compare the times.
The brickwall filter cannot be built. Here is exactly why.
Ask for a response that is 1 below cutoff and 0 above it, and the inverse transform hands you a sinc — which extends to ±∞ in time and is non-zero before t = 0. Infinite means unbuildable. Non-causal means it needs the future. So you truncate, and truncation has a price.
Chop the sinc with a rectangular window and the overshoot at the edge settles at about 9 % and refuses to shrink. Adding taps makes the ripple narrower, never shorter. That is not a bug in your design — it is what a discontinuity does.
Taper the window and the sidelobes drop from −21 dB to −74 dB, but the transition band gets wider for the same tap count. Sharpness, stopband depth, tap count: pick two. That single trade is most of practical FIR design.
Your spectrum analyser is lying, politely
Textbook: a pure sine gives a single spectral line. Reality: one clean bin only when the sine completes a whole number of cycles inside your capture window. Move it half a bin off and the energy smears across the entire spectrum.
Off-bin energy has nowhere legal to go, so it spreads — leakage. The peak also reads low, by nearly 4 dB with no window, because the true peak falls between two bins — scalloping loss. Your amplitude measurement is wrong and the plot looks perfectly healthy.
A window fades the capture to zero at both ends so the tiled version has no jump. Leakage collapses; in exchange the main lobe widens, so two close tones merge. Dynamic range or resolution — same trade as §07, because it is the same mathematics.
Finite word length: where IIR bites back
On paper your coefficients are real numbers. In an FPGA or a fixed-point DSP they are integers with a binary point. Rounding them moves the poles. For a high-Q filter the poles sit near the unit circle already, and there may not be a representable grid point left on the safe side.
Push f₀ down and the poles crowd against z = 1, where the coefficient grid is coarsest relative to what you need. Walk the bits down on this Q = 30, f₀ = 0.02 resonator: it detunes first, then at 6 fractional bits both poles land exactly on the circle and it oscillates forever on its own. Fix: cascade biquads instead of one high-order section, or move to a coupled-form / lattice structure whose grid is uniform.
Round FIR coefficients and the stopband gets shallower. That is the whole failure mode. There are no poles to displace, so no amount of rounding can make it unstable — which is why FIR wins wherever a filter must never, under any conditions, misbehave.
The failure that no filter downstream can undo
Sample a tone above fs/2 and it does not disappear — it comes back wearing a disguise, at |f − k·fs|, indistinguishable from a real low-frequency signal. Once the ADC has folded it in, the information is gone.
The short version
- FIR — no feedback, finite h[n], always stable, linear phase available, many taps.
- IIR — feedback, infinite h[n], can be unstable, cheap for sharp responses, phase warps.
- Analog gives you IIR for the price of a capacitor. Analog FIR needs a real delay line, so it is rare and expensive.
- Digital gives you an exact delay for the price of a flip-flop, which makes FIR the default.
- Choose FIR when phase linearity matters, when the response must be reconfigurable, or when instability is unacceptable.
- Choose IIR when a sharp response has to fit in a tiny compute budget and phase is not critical.
- Fourier transform — continuous in, continuous out. A definition, not something you run.
- DFT — N samples in, N bins out. The computable one. Assumes your window repeats forever.
- FFT — an algorithm for the DFT. Identical output, O(N log N) instead of O(N²).
- Leakage happens when the tone is not an exact bin multiple. Windows trade it against resolution.
- Bin spacing is fs/N. Zero-padding interpolates the plot; it never adds resolution.
- Alias first, ask later — nothing after the ADC can separate a folded tone from a genuine one.